#ifndef __USR_DDR_IMG_TABLE_H__
#define __USR_DDR_IMG_TABLE_H__


#define USR_DDR_IMG_ANIM_0_ADDR             (KDP_DDR_LAST_ADDR + 0x00000000) // 0x63221E00, file=flash_bin\anim_0.bin
#define USR_DDR_IMG_ANIM_0_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_1_ADDR             (KDP_DDR_LAST_ADDR + 0x00025800) // 0x63247600, file=flash_bin\anim_1.bin
#define USR_DDR_IMG_ANIM_1_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_2_ADDR             (KDP_DDR_LAST_ADDR + 0x0004B800) // 0x6326D600, file=flash_bin\anim_2.bin
#define USR_DDR_IMG_ANIM_2_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_3_ADDR             (KDP_DDR_LAST_ADDR + 0x00071800) // 0x63293600, file=flash_bin\anim_3.bin
#define USR_DDR_IMG_ANIM_3_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_4_ADDR             (KDP_DDR_LAST_ADDR + 0x00097800) // 0x632B9600, file=flash_bin\anim_4.bin
#define USR_DDR_IMG_ANIM_4_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_5_ADDR             (KDP_DDR_LAST_ADDR + 0x000BD800) // 0x632DF600, file=flash_bin\anim_5.bin
#define USR_DDR_IMG_ANIM_5_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_6_ADDR             (KDP_DDR_LAST_ADDR + 0x000E3800) // 0x63305600, file=flash_bin\anim_6.bin
#define USR_DDR_IMG_ANIM_6_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_7_ADDR             (KDP_DDR_LAST_ADDR + 0x00109800) // 0x6332B600, file=flash_bin\anim_7.bin
#define USR_DDR_IMG_ANIM_7_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_8_ADDR             (KDP_DDR_LAST_ADDR + 0x0012F800) // 0x63351600, file=flash_bin\anim_8.bin
#define USR_DDR_IMG_ANIM_8_SIZE             0x00025800
#define USR_DDR_IMG_ANIM_9_ADDR             (KDP_DDR_LAST_ADDR + 0x00155800) // 0x63377600, file=flash_bin\anim_9.bin
#define USR_DDR_IMG_ANIM_9_SIZE             0x00025800
#define USR_DDR_IMG_BTN_CANCEL_NORMAL_ADDR  (KDP_DDR_LAST_ADDR + 0x0017B800) // 0x6339D600, file=flash_bin\btn_cancel_normal.bin
#define USR_DDR_IMG_BTN_CANCEL_NORMAL_SIZE  0x00005A00
#define USR_DDR_IMG_BTN_CANCEL_NORMAL_E_ADDR (KDP_DDR_LAST_ADDR + 0x00181A00) // 0x633A3800, file=flash_bin\btn_cancel_normal_E.bin
#define USR_DDR_IMG_BTN_CANCEL_NORMAL_E_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_CANCEL_PRESSED_ADDR (KDP_DDR_LAST_ADDR + 0x00187E00) // 0x633A9C00, file=flash_bin\btn_cancel_pressed.bin
#define USR_DDR_IMG_BTN_CANCEL_PRESSED_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_CANCEL_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x0018E600) // 0x633B0400, file=flash_bin\btn_cancel_pressed_E.bin
#define USR_DDR_IMG_BTN_CANCEL_PRESSED_E_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_FACE_ADDR           (KDP_DDR_LAST_ADDR + 0x00194600) // 0x633B6400, file=flash_bin\btn_face.bin
#define USR_DDR_IMG_BTN_FACE_SIZE           0x00002D00
#define USR_DDR_IMG_BTN_FACE_E_ADDR         (KDP_DDR_LAST_ADDR + 0x00197900) // 0x633B9700, file=flash_bin\btn_face_E.bin
#define USR_DDR_IMG_BTN_FACE_E_SIZE         0x00002D00
#define USR_DDR_IMG_BTN_FACE_PRESSED_ADDR   (KDP_DDR_LAST_ADDR + 0x0019AF00) // 0x633BCD00, file=flash_bin\btn_face_pressed.bin
#define USR_DDR_IMG_BTN_FACE_PRESSED_SIZE   0x00002D00
#define USR_DDR_IMG_BTN_FACE_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x0019EB00) // 0x633C0900, file=flash_bin\btn_face_pressed_E.bin
#define USR_DDR_IMG_BTN_FACE_PRESSED_E_SIZE 0x00002D00
#define USR_DDR_IMG_BTN_GOON_ADDR           (KDP_DDR_LAST_ADDR + 0x001A2300) // 0x633C4100, file=flash_bin\btn_goon.bin
#define USR_DDR_IMG_BTN_GOON_SIZE           0x00002D00
#define USR_DDR_IMG_BTN_GOON_E_ADDR         (KDP_DDR_LAST_ADDR + 0x001A5300) // 0x633C7100, file=flash_bin\btn_goon_E.bin
#define USR_DDR_IMG_BTN_GOON_E_SIZE         0x00002D00
#define USR_DDR_IMG_BTN_GOON_PRESSED_ADDR   (KDP_DDR_LAST_ADDR + 0x001A8300) // 0x633CA100, file=flash_bin\btn_goon_pressed.bin
#define USR_DDR_IMG_BTN_GOON_PRESSED_SIZE   0x00002D00
#define USR_DDR_IMG_BTN_GOON_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x001AB300) // 0x633CD100, file=flash_bin\btn_goon_pressed_E.bin
#define USR_DDR_IMG_BTN_GOON_PRESSED_E_SIZE 0x00002D00
#define USR_DDR_IMG_BTN_NEXT_ADDR           (KDP_DDR_LAST_ADDR + 0x001AE300) // 0x633D0100, file=flash_bin\btn_next.bin
#define USR_DDR_IMG_BTN_NEXT_SIZE           0x00002D00
#define USR_DDR_IMG_BTN_NEXT_E_ADDR         (KDP_DDR_LAST_ADDR + 0x001B1300) // 0x633D3100, file=flash_bin\btn_next_E.bin
#define USR_DDR_IMG_BTN_NEXT_E_SIZE         0x00002D00
#define USR_DDR_IMG_BTN_NEXT_PRESSED_ADDR   (KDP_DDR_LAST_ADDR + 0x001B4300) // 0x633D6100, file=flash_bin\btn_next_pressed.bin
#define USR_DDR_IMG_BTN_NEXT_PRESSED_SIZE   0x00002D00
#define USR_DDR_IMG_BTN_NEXT_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x001B7300) // 0x633D9100, file=flash_bin\btn_next_pressed_E.bin
#define USR_DDR_IMG_BTN_NEXT_PRESSED_E_SIZE 0x00002D00
#define USR_DDR_IMG_BTN_OVER_ADDR           (KDP_DDR_LAST_ADDR + 0x001BA300) // 0x633DC100, file=flash_bin\btn_over.bin
#define USR_DDR_IMG_BTN_OVER_SIZE           0x00002D00
#define USR_DDR_IMG_BTN_OVER_E_ADDR         (KDP_DDR_LAST_ADDR + 0x001BD300) // 0x633DF100, file=flash_bin\btn_over_E.bin
#define USR_DDR_IMG_BTN_OVER_E_SIZE         0x00002D00
#define USR_DDR_IMG_BTN_OVER_PRESSED_ADDR   (KDP_DDR_LAST_ADDR + 0x001C0300) // 0x633E2100, file=flash_bin\btn_over_pressed.bin
#define USR_DDR_IMG_BTN_OVER_PRESSED_SIZE   0x00002D00
#define USR_DDR_IMG_BTN_OVER_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x001C3300) // 0x633E5100, file=flash_bin\btn_over_pressed_E.bin
#define USR_DDR_IMG_BTN_OVER_PRESSED_E_SIZE 0x00002D00
#define USR_DDR_IMG_BTN_PW_ADDR             (KDP_DDR_LAST_ADDR + 0x001C6300) // 0x633E8100, file=flash_bin\btn_pw.bin
#define USR_DDR_IMG_BTN_PW_SIZE             0x00002D00
#define USR_DDR_IMG_BTN_PW_E_ADDR           (KDP_DDR_LAST_ADDR + 0x001C9300) // 0x633EB100, file=flash_bin\btn_pw_E.bin
#define USR_DDR_IMG_BTN_PW_E_SIZE           0x00002D00
#define USR_DDR_IMG_BTN_PW_PRESSED_ADDR     (KDP_DDR_LAST_ADDR + 0x001CC300) // 0x633EE100, file=flash_bin\btn_pw_pressed.bin
#define USR_DDR_IMG_BTN_PW_PRESSED_SIZE     0x00002D00
#define USR_DDR_IMG_BTN_PW_PRESSED_E_ADDR   (KDP_DDR_LAST_ADDR + 0x001CF300) // 0x633F1100, file=flash_bin\btn_pw_pressed_E.bin
#define USR_DDR_IMG_BTN_PW_PRESSED_E_SIZE   0x00002D00
#define USR_DDR_IMG_BTN_RETRY_NORMAL_ADDR   (KDP_DDR_LAST_ADDR + 0x001D2300) // 0x633F4100, file=flash_bin\btn_retry_normal.bin
#define USR_DDR_IMG_BTN_RETRY_NORMAL_SIZE   0x00005A00
#define USR_DDR_IMG_BTN_RETRY_NORMAL_E_ADDR (KDP_DDR_LAST_ADDR + 0x001D8000) // 0x633F9E00, file=flash_bin\btn_retry_normal_E.bin
#define USR_DDR_IMG_BTN_RETRY_NORMAL_E_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_RETRY_PRESSED_ADDR  (KDP_DDR_LAST_ADDR + 0x001DDA00) // 0x633FF800, file=flash_bin\btn_retry_pressed.bin
#define USR_DDR_IMG_BTN_RETRY_PRESSED_SIZE  0x00005A00
#define USR_DDR_IMG_BTN_RETRY_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x001E3E00) // 0x63405C00, file=flash_bin\btn_retry_pressed_E.bin
#define USR_DDR_IMG_BTN_RETRY_PRESSED_E_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_TRY_ADDR            (KDP_DDR_LAST_ADDR + 0x001EA600) // 0x6340C400, file=flash_bin\btn_try.bin
#define USR_DDR_IMG_BTN_TRY_SIZE            0x00002D00
#define USR_DDR_IMG_BTN_TRY_E_ADDR          (KDP_DDR_LAST_ADDR + 0x001ED900) // 0x6340F700, file=flash_bin\btn_try_E.bin
#define USR_DDR_IMG_BTN_TRY_E_SIZE          0x00002D00
#define USR_DDR_IMG_BTN_TRY_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x001F0F00) // 0x63412D00, file=flash_bin\btn_try_pressed.bin
#define USR_DDR_IMG_BTN_TRY_PRESSED_SIZE    0x00002D00
#define USR_DDR_IMG_BTN_TRY_PRESSED_E_ADDR  (KDP_DDR_LAST_ADDR + 0x001F4B00) // 0x63416900, file=flash_bin\btn_try_pressed_E.bin
#define USR_DDR_IMG_BTN_TRY_PRESSED_E_SIZE  0x00002D00
#define USR_DDR_IMG_BTN_UNLOCK_NORMAL_ADDR  (KDP_DDR_LAST_ADDR + 0x001F8300) // 0x6341A100, file=flash_bin\btn_unlock_normal.bin
#define USR_DDR_IMG_BTN_UNLOCK_NORMAL_SIZE  0x00005A00
#define USR_DDR_IMG_BTN_UNLOCK_NORMAL_E_ADDR (KDP_DDR_LAST_ADDR + 0x001FE000) // 0x6341FE00, file=flash_bin\btn_unlock_normal_E.bin
#define USR_DDR_IMG_BTN_UNLOCK_NORMAL_E_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_UNLOCK_PRESSED_ADDR (KDP_DDR_LAST_ADDR + 0x00203A00) // 0x63425800, file=flash_bin\btn_unlock_pressed.bin
#define USR_DDR_IMG_BTN_UNLOCK_PRESSED_SIZE 0x00005A00
#define USR_DDR_IMG_BTN_UNLOCK_PRESSED_E_ADDR (KDP_DDR_LAST_ADDR + 0x00209E00) // 0x6342BC00, file=flash_bin\btn_unlock_pressed_E.bin
#define USR_DDR_IMG_BTN_UNLOCK_PRESSED_E_SIZE 0x00005A00
#define USR_DDR_IMG_DIGIT_0_ADDR            (KDP_DDR_LAST_ADDR + 0x00210600) // 0x63432400, file=flash_bin\digit_0.bin
#define USR_DDR_IMG_DIGIT_0_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_0_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00212E08) // 0x63434C08, file=flash_bin\digit_0_pressed.bin
#define USR_DDR_IMG_DIGIT_0_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_1_ADDR            (KDP_DDR_LAST_ADDR + 0x00215E18) // 0x63437C18, file=flash_bin\digit_1.bin
#define USR_DDR_IMG_DIGIT_1_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_1_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00218E38) // 0x6343AC38, file=flash_bin\digit_1_pressed.bin
#define USR_DDR_IMG_DIGIT_1_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_2_ADDR            (KDP_DDR_LAST_ADDR + 0x0021BE78) // 0x6343DC78, file=flash_bin\digit_2.bin
#define USR_DDR_IMG_DIGIT_2_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_2_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x0021EEF8) // 0x63440CF8, file=flash_bin\digit_2_pressed.bin
#define USR_DDR_IMG_DIGIT_2_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_3_ADDR            (KDP_DDR_LAST_ADDR + 0x00221FF8) // 0x63443DF8, file=flash_bin\digit_3.bin
#define USR_DDR_IMG_DIGIT_3_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_3_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x002251F8) // 0x63446FF8, file=flash_bin\digit_3_pressed.bin
#define USR_DDR_IMG_DIGIT_3_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_4_ADDR            (KDP_DDR_LAST_ADDR + 0x002275F8) // 0x634493F8, file=flash_bin\digit_4.bin
#define USR_DDR_IMG_DIGIT_4_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_4_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00229DF8) // 0x6344BBF8, file=flash_bin\digit_4_pressed.bin
#define USR_DDR_IMG_DIGIT_4_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_5_ADDR            (KDP_DDR_LAST_ADDR + 0x0022CDF8) // 0x6344EBF8, file=flash_bin\digit_5.bin
#define USR_DDR_IMG_DIGIT_5_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_5_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x0022FDF8) // 0x63451BF8, file=flash_bin\digit_5_pressed.bin
#define USR_DDR_IMG_DIGIT_5_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_6_ADDR            (KDP_DDR_LAST_ADDR + 0x00232DF8) // 0x63454BF8, file=flash_bin\digit_6.bin
#define USR_DDR_IMG_DIGIT_6_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_6_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00235DF8) // 0x63457BF8, file=flash_bin\digit_6_pressed.bin
#define USR_DDR_IMG_DIGIT_6_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_7_ADDR            (KDP_DDR_LAST_ADDR + 0x00238DF8) // 0x6345ABF8, file=flash_bin\digit_7.bin
#define USR_DDR_IMG_DIGIT_7_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_7_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x0023BDF8) // 0x6345DBF8, file=flash_bin\digit_7_pressed.bin
#define USR_DDR_IMG_DIGIT_7_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_8_ADDR            (KDP_DDR_LAST_ADDR + 0x0023EDF8) // 0x63460BF8, file=flash_bin\digit_8.bin
#define USR_DDR_IMG_DIGIT_8_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_8_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00241DF8) // 0x63463BF8, file=flash_bin\digit_8_pressed.bin
#define USR_DDR_IMG_DIGIT_8_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_9_ADDR            (KDP_DDR_LAST_ADDR + 0x00244DF8) // 0x63466BF8, file=flash_bin\digit_9.bin
#define USR_DDR_IMG_DIGIT_9_SIZE            0x00002208
#define USR_DDR_IMG_DIGIT_9_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x00247DF8) // 0x63469BF8, file=flash_bin\digit_9_pressed.bin
#define USR_DDR_IMG_DIGIT_9_PRESSED_SIZE    0x00002208
#define USR_DDR_IMG_DIGIT_END_ADDR          (KDP_DDR_LAST_ADDR + 0x0024ADF8) // 0x6346CBF8, file=flash_bin\digit_end.bin
#define USR_DDR_IMG_DIGIT_END_SIZE          0x00002208
#define USR_DDR_IMG_DIGIT_END_PRESSED_ADDR  (KDP_DDR_LAST_ADDR + 0x0024DDF8) // 0x6346FBF8, file=flash_bin\digit_end_pressed.bin
#define USR_DDR_IMG_DIGIT_END_PRESSED_SIZE  0x00002208
#define USR_DDR_IMG_DIGIT_STAR_ADDR         (KDP_DDR_LAST_ADDR + 0x00250DF8) // 0x63472BF8, file=flash_bin\digit_star.bin
#define USR_DDR_IMG_DIGIT_STAR_SIZE         0x00002208
#define USR_DDR_IMG_DIGIT_STAR_PRESSED_ADDR (KDP_DDR_LAST_ADDR + 0x00253DF8) // 0x63475BF8, file=flash_bin\digit_star_pressed.bin
#define USR_DDR_IMG_DIGIT_STAR_PRESSED_SIZE 0x00002208
#define USR_DDR_IMG_ICON_BATTERY_LOW_WARING_ADDR (KDP_DDR_LAST_ADDR + 0x00256DF8) // 0x63478BF8, file=flash_bin\icon_battery_low_waring.bin
#define USR_DDR_IMG_ICON_BATTERY_LOW_WARING_SIZE 0x00002208
#define USR_DDR_IMG_ICON_FAIL_ADDR          (KDP_DDR_LAST_ADDR + 0x00259DF8) // 0x6347BBF8, file=flash_bin\icon_fail.bin
#define USR_DDR_IMG_ICON_FAIL_SIZE          0x00002208
#define USR_DDR_IMG_ICON_FP_ADDR            (KDP_DDR_LAST_ADDR + 0x0025CDF8) // 0x6347EBF8, file=flash_bin\icon_fp.bin
#define USR_DDR_IMG_ICON_FP_SIZE            0x00002208
#define USR_DDR_IMG_ICON_PASSWORD_ADDR      (KDP_DDR_LAST_ADDR + 0x0025FDF8) // 0x63481BF8, file=flash_bin\icon_password.bin
#define USR_DDR_IMG_ICON_PASSWORD_SIZE      0x00000708
#define USR_DDR_IMG_ICON_SECURITY_ADDR      (KDP_DDR_LAST_ADDR + 0x002612F8) // 0x634830F8, file=flash_bin\icon_security.bin
#define USR_DDR_IMG_ICON_SECURITY_SIZE      0x00002208
#define USR_DDR_IMG_ICON_SUCCESS_ADDR       (KDP_DDR_LAST_ADDR + 0x002637F8) // 0x634855F8, file=flash_bin\icon_success.bin
#define USR_DDR_IMG_ICON_SUCCESS_SIZE       0x00002208
#define USR_DDR_IMG_ICON_WARNING_ADDR       (KDP_DDR_LAST_ADDR + 0x002661F8) // 0x63487FF8, file=flash_bin\icon_warning.bin
#define USR_DDR_IMG_ICON_WARNING_SIZE       0x00002208
#define USR_DDR_IMG_INPUT_BG_ADDR           (KDP_DDR_LAST_ADDR + 0x002685F8) // 0x6348A3F8, file=flash_bin\input_bg.bin
#define USR_DDR_IMG_INPUT_BG_SIZE           0x00002580
#define USR_DDR_IMG_INPUT_BG_E_ADDR         (KDP_DDR_LAST_ADDR + 0x0026B170) // 0x6348CF70, file=flash_bin\input_bg_E.bin
#define USR_DDR_IMG_INPUT_BG_E_SIZE         0x00002580
#define USR_DDR_IMG_KEY_DEL_ADDR            (KDP_DDR_LAST_ADDR + 0x0026D860) // 0x6348F660, file=flash_bin\key_del.bin
#define USR_DDR_IMG_KEY_DEL_SIZE            0x00000F20
#define USR_DDR_IMG_KEY_DEL_PRESSED_ADDR    (KDP_DDR_LAST_ADDR + 0x0026EFE0) // 0x63490DE0, file=flash_bin\key_del_pressed.bin
#define USR_DDR_IMG_KEY_DEL_PRESSED_SIZE    0x00000F20
#define USR_DDR_IMG_LEFT_1_ADDR             (KDP_DDR_LAST_ADDR + 0x00270EE0) // 0x63492CE0, file=flash_bin\left_1.bin
#define USR_DDR_IMG_LEFT_1_SIZE             0x000004B0
#define USR_DDR_IMG_LEFT_2_ADDR             (KDP_DDR_LAST_ADDR + 0x00272270) // 0x63494070, file=flash_bin\left_2.bin
#define USR_DDR_IMG_LEFT_2_SIZE             0x000004B0
#define USR_DDR_IMG_LEFT_3_ADDR             (KDP_DDR_LAST_ADDR + 0x00272990) // 0x63494790, file=flash_bin\left_3.bin
#define USR_DDR_IMG_LEFT_3_SIZE             0x000004B0
#define USR_DDR_IMG_LEFT_4_ADDR             (KDP_DDR_LAST_ADDR + 0x002737D0) // 0x634955D0, file=flash_bin\left_4.bin
#define USR_DDR_IMG_LEFT_4_SIZE             0x000004B0
#define USR_DDR_IMG_LEFT_5_ADDR             (KDP_DDR_LAST_ADDR + 0x00274450) // 0x63496250, file=flash_bin\left_5.bin
#define USR_DDR_IMG_LEFT_5_SIZE             0x000004B0
#define USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_ADDR (KDP_DDR_LAST_ADDR + 0x00274D50) // 0x63496B50, file=flash_bin\tips_battery_low_warning.bin
#define USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_SIZE 0x00001C20
#define USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_E_ADDR (KDP_DDR_LAST_ADDR + 0x002776C0) // 0x634994C0, file=flash_bin\tips_battery_low_warning_E.bin
#define USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_E_SIZE 0x000036B0
#define USR_DDR_IMG_TIPS_CHOOSE_ADDR        (KDP_DDR_LAST_ADDR + 0x0027B430) // 0x6349D230, file=flash_bin\tips_choose.bin
#define USR_DDR_IMG_TIPS_CHOOSE_SIZE        0x00001C20
#define USR_DDR_IMG_TIPS_CHOOSE_E_ADDR      (KDP_DDR_LAST_ADDR + 0x0027D480) // 0x6349F280, file=flash_bin\tips_choose_E.bin
#define USR_DDR_IMG_TIPS_CHOOSE_E_SIZE      0x00002EE0
#define USR_DDR_IMG_TIPS_EXIST_ADDR         (KDP_DDR_LAST_ADDR + 0x002807E0) // 0x634A25E0, file=flash_bin\tips_exist.bin
#define USR_DDR_IMG_TIPS_EXIST_SIZE         0x00001C20
#define USR_DDR_IMG_TIPS_EXIST_E_ADDR       (KDP_DDR_LAST_ADDR + 0x00282BE0) // 0x634A49E0, file=flash_bin\tips_exist_E.bin
#define USR_DDR_IMG_TIPS_EXIST_E_SIZE       0x00002EE0
#define USR_DDR_IMG_TIPS_FAIL_E_ADDR        (KDP_DDR_LAST_ADDR + 0x002866A0) // 0x634A84A0, file=flash_bin\tips_fail_E.bin
#define USR_DDR_IMG_TIPS_FAIL_E_SIZE        0x00002EE0
#define USR_DDR_IMG_TIPS_INPUT_FAIL_ADDR    (KDP_DDR_LAST_ADDR + 0x00289C20) // 0x634ABA20, file=flash_bin\tips_input_fail.bin
#define USR_DDR_IMG_TIPS_INPUT_FAIL_SIZE    0x00001C20
#define USR_DDR_IMG_TIPS_INPUT_FP_ADDR      (KDP_DDR_LAST_ADDR + 0x0028C460) // 0x634AE260, file=flash_bin\tips_input_fp.bin
#define USR_DDR_IMG_TIPS_INPUT_FP_SIZE      0x00001C20
#define USR_DDR_IMG_TIPS_INPUT_FP_E_ADDR    (KDP_DDR_LAST_ADDR + 0x0028E4E0) // 0x634B02E0, file=flash_bin\tips_input_fp_E.bin
#define USR_DDR_IMG_TIPS_INPUT_FP_E_SIZE    0x000036B0
#define USR_DDR_IMG_TIPS_INPUT_SUCCESS_ADDR (KDP_DDR_LAST_ADDR + 0x00292070) // 0x634B3E70, file=flash_bin\tips_input_success.bin
#define USR_DDR_IMG_TIPS_INPUT_SUCCESS_SIZE 0x00001C20
#define USR_DDR_IMG_TIPS_LEFT_ADDR          (KDP_DDR_LAST_ADDR + 0x00293D00) // 0x634B5B00, file=flash_bin\tips_left.bin
#define USR_DDR_IMG_TIPS_LEFT_SIZE          0x00001C20
#define USR_DDR_IMG_TIPS_LEFT_E_ADDR        (KDP_DDR_LAST_ADDR + 0x00296620) // 0x634B8420, file=flash_bin\tips_left_E.bin
#define USR_DDR_IMG_TIPS_LEFT_E_SIZE        0x00001C20
#define USR_DDR_IMG_TIPS_POWER_OFF_ADDR     (KDP_DDR_LAST_ADDR + 0x00298860) // 0x634BA660, file=flash_bin\tips_power_off.bin
#define USR_DDR_IMG_TIPS_POWER_OFF_SIZE     0x00001C20
#define USR_DDR_IMG_TIPS_POWER_OFF_E_ADDR   (KDP_DDR_LAST_ADDR + 0x0029ACE0) // 0x634BCAE0, file=flash_bin\tips_power_off_E.bin
#define USR_DDR_IMG_TIPS_POWER_OFF_E_SIZE   0x00002EE0
#define USR_DDR_IMG_TIPS_RECOGNIZED_FAIL_ADDR (KDP_DDR_LAST_ADDR + 0x0029E8A0) // 0x634C06A0, file=flash_bin\tips_recognized_fail.bin
#define USR_DDR_IMG_TIPS_RECOGNIZED_FAIL_SIZE 0x00001C20
#define USR_DDR_IMG_TIPS_RECOGNIZED_SUCCESS_ADDR (KDP_DDR_LAST_ADDR + 0x002A0D60) // 0x634C2B60, file=flash_bin\tips_recognized_success.bin
#define USR_DDR_IMG_TIPS_RECOGNIZED_SUCCESS_SIZE 0x00001C20
#define USR_DDR_IMG_TIPS_RETRY_LATER_ADDR   (KDP_DDR_LAST_ADDR + 0x002A36E0) // 0x634C54E0, file=flash_bin\tips_retry_later.bin
#define USR_DDR_IMG_TIPS_RETRY_LATER_SIZE   0x00001C20
#define USR_DDR_IMG_TIPS_RETRY_LATER_E_ADDR (KDP_DDR_LAST_ADDR + 0x002A59E0) // 0x634C77E0, file=flash_bin\tips_retry_later_E.bin
#define USR_DDR_IMG_TIPS_RETRY_LATER_E_SIZE 0x00002EE0
#define USR_DDR_IMG_TIPS_SUCCESS_E_ADDR     (KDP_DDR_LAST_ADDR + 0x002A92A0) // 0x634CB0A0, file=flash_bin\tips_success_E.bin
#define USR_DDR_IMG_TIPS_SUCCESS_E_SIZE     0x00002EE0
#define USR_DDR_IMG_TIPS_SYNC_TIME_ADDR     (KDP_DDR_LAST_ADDR + 0x002AC420) // 0x634CE220, file=flash_bin\tips_sync_time.bin
#define USR_DDR_IMG_TIPS_SYNC_TIME_SIZE     0x00001C20
#define USR_DDR_IMG_TIPS_SYNC_TIME_E_ADDR   (KDP_DDR_LAST_ADDR + 0x002AE460) // 0x634D0260, file=flash_bin\tips_sync_time_E.bin
#define USR_DDR_IMG_TIPS_SYNC_TIME_E_SIZE   0x000036B0
#define USR_DDR_IMG_TIPS_SYSTEM_LOCKED_ADDR (KDP_DDR_LAST_ADDR + 0x002B1F70) // 0x634D3D70, file=flash_bin\tips_system_locked.bin
#define USR_DDR_IMG_TIPS_SYSTEM_LOCKED_SIZE 0x00001C20
#define USR_DDR_IMG_TIPS_SYSTEM_LOCKED_E_ADDR (KDP_DDR_LAST_ADDR + 0x002B4B00) // 0x634D6900, file=flash_bin\tips_system_locked_E.bin
#define USR_DDR_IMG_TIPS_SYSTEM_LOCKED_E_SIZE 0x00002EE0
#define USR_DDR_IMG_TIPS_USER_DISABLE_ADDR  (KDP_DDR_LAST_ADDR + 0x002B84E0) // 0x634DA2E0, file=flash_bin\tips_user_disable.bin
#define USR_DDR_IMG_TIPS_USER_DISABLE_SIZE  0x00001C20
#define USR_DDR_IMG_TIPS_USER_DISABLE_E_ADDR (KDP_DDR_LAST_ADDR + 0x002BA5E0) // 0x634DC3E0, file=flash_bin\tips_user_disable_E.bin
#define USR_DDR_IMG_TIPS_USER_DISABLE_E_SIZE 0x00002EE0
#define USR_DDR_IMG_TIPS_USER_FULL_ADDR     (KDP_DDR_LAST_ADDR + 0x002BDAA0) // 0x634DF8A0, file=flash_bin\tips_user_full.bin
#define USR_DDR_IMG_TIPS_USER_FULL_SIZE     0x00001C20
#define USR_DDR_IMG_TIPS_USER_FULL_E_ADDR   (KDP_DDR_LAST_ADDR + 0x002C0160) // 0x634E1F60, file=flash_bin\tips_user_full_E.bin
#define USR_DDR_IMG_TIPS_USER_FULL_E_SIZE   0x00002EE0
#define USR_DDR_IMG_TIPS_USER_INVALID_ADDR  (KDP_DDR_LAST_ADDR + 0x002C31A0) // 0x634E4FA0, file=flash_bin\tips_user_invalid.bin
#define USR_DDR_IMG_TIPS_USER_INVALID_SIZE  0x00001C20
#define USR_DDR_IMG_TIPS_USER_INVALID_E_ADDR (KDP_DDR_LAST_ADDR + 0x002C4F60) // 0x634E6D60, file=flash_bin\tips_user_invalid_E.bin
#define USR_DDR_IMG_TIPS_USER_INVALID_E_SIZE 0x00002EE0
#define USR_DDR_IMG_TIPS_USER_OK_ADDR       (KDP_DDR_LAST_ADDR + 0x002C8DA0) // 0x634EABA0, file=flash_bin\tips_user_ok.bin
#define USR_DDR_IMG_TIPS_USER_OK_SIZE       0x00001C20
#define USR_DDR_IMG_TIPS_VERIFY_FAIL_ADDR   (KDP_DDR_LAST_ADDR + 0x002CB760) // 0x634ED560, file=flash_bin\tips_verify_fail.bin
#define USR_DDR_IMG_TIPS_VERIFY_FAIL_SIZE   0x00001C20
#define USR_DDR_IMG_TIPS_VERIFY_SUCCESS_ADDR (KDP_DDR_LAST_ADDR + 0x002CDAE0) // 0x634EF8E0, file=flash_bin\tips_verify_success.bin
#define USR_DDR_IMG_TIPS_VERIFY_SUCCESS_SIZE 0x00001C20

/*

//Copy the content of this annotation to kl520_api_ddr_img_user()
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_0_ADDR, USR_FLASH_IMG_ANIM_0_ADDR, USR_FLASH_IMG_ANIM_0_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_1_ADDR, USR_FLASH_IMG_ANIM_1_ADDR, USR_FLASH_IMG_ANIM_1_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_2_ADDR, USR_FLASH_IMG_ANIM_2_ADDR, USR_FLASH_IMG_ANIM_2_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_3_ADDR, USR_FLASH_IMG_ANIM_3_ADDR, USR_FLASH_IMG_ANIM_3_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_4_ADDR, USR_FLASH_IMG_ANIM_4_ADDR, USR_FLASH_IMG_ANIM_4_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_5_ADDR, USR_FLASH_IMG_ANIM_5_ADDR, USR_FLASH_IMG_ANIM_5_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_6_ADDR, USR_FLASH_IMG_ANIM_6_ADDR, USR_FLASH_IMG_ANIM_6_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_7_ADDR, USR_FLASH_IMG_ANIM_7_ADDR, USR_FLASH_IMG_ANIM_7_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_8_ADDR, USR_FLASH_IMG_ANIM_8_ADDR, USR_FLASH_IMG_ANIM_8_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ANIM_9_ADDR, USR_FLASH_IMG_ANIM_9_ADDR, USR_FLASH_IMG_ANIM_9_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_CANCEL_NORMAL_ADDR, USR_FLASH_IMG_BTN_CANCEL_NORMAL_ADDR, USR_FLASH_IMG_BTN_CANCEL_NORMAL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_CANCEL_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_CANCEL_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_CANCEL_NORMAL_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_CANCEL_PRESSED_ADDR, USR_FLASH_IMG_BTN_CANCEL_PRESSED_ADDR, USR_FLASH_IMG_BTN_CANCEL_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_CANCEL_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_CANCEL_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_CANCEL_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_FACE_ADDR, USR_FLASH_IMG_BTN_FACE_ADDR, USR_FLASH_IMG_BTN_FACE_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_FACE_E_ADDR, USR_FLASH_IMG_BTN_FACE_E_ADDR, USR_FLASH_IMG_BTN_FACE_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_FACE_PRESSED_ADDR, USR_FLASH_IMG_BTN_FACE_PRESSED_ADDR, USR_FLASH_IMG_BTN_FACE_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_FACE_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_FACE_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_FACE_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_GOON_ADDR, USR_FLASH_IMG_BTN_GOON_ADDR, USR_FLASH_IMG_BTN_GOON_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_GOON_E_ADDR, USR_FLASH_IMG_BTN_GOON_E_ADDR, USR_FLASH_IMG_BTN_GOON_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_GOON_PRESSED_ADDR, USR_FLASH_IMG_BTN_GOON_PRESSED_ADDR, USR_FLASH_IMG_BTN_GOON_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_GOON_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_GOON_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_GOON_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_NEXT_ADDR, USR_FLASH_IMG_BTN_NEXT_ADDR, USR_FLASH_IMG_BTN_NEXT_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_NEXT_E_ADDR, USR_FLASH_IMG_BTN_NEXT_E_ADDR, USR_FLASH_IMG_BTN_NEXT_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_NEXT_PRESSED_ADDR, USR_FLASH_IMG_BTN_NEXT_PRESSED_ADDR, USR_FLASH_IMG_BTN_NEXT_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_NEXT_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_NEXT_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_NEXT_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_OVER_ADDR, USR_FLASH_IMG_BTN_OVER_ADDR, USR_FLASH_IMG_BTN_OVER_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_OVER_E_ADDR, USR_FLASH_IMG_BTN_OVER_E_ADDR, USR_FLASH_IMG_BTN_OVER_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_OVER_PRESSED_ADDR, USR_FLASH_IMG_BTN_OVER_PRESSED_ADDR, USR_FLASH_IMG_BTN_OVER_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_OVER_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_OVER_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_OVER_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_PW_ADDR, USR_FLASH_IMG_BTN_PW_ADDR, USR_FLASH_IMG_BTN_PW_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_PW_E_ADDR, USR_FLASH_IMG_BTN_PW_E_ADDR, USR_FLASH_IMG_BTN_PW_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_PW_PRESSED_ADDR, USR_FLASH_IMG_BTN_PW_PRESSED_ADDR, USR_FLASH_IMG_BTN_PW_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_PW_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_PW_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_PW_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_RETRY_NORMAL_ADDR, USR_FLASH_IMG_BTN_RETRY_NORMAL_ADDR, USR_FLASH_IMG_BTN_RETRY_NORMAL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_RETRY_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_RETRY_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_RETRY_NORMAL_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_RETRY_PRESSED_ADDR, USR_FLASH_IMG_BTN_RETRY_PRESSED_ADDR, USR_FLASH_IMG_BTN_RETRY_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_RETRY_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_RETRY_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_RETRY_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_TRY_ADDR, USR_FLASH_IMG_BTN_TRY_ADDR, USR_FLASH_IMG_BTN_TRY_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_TRY_E_ADDR, USR_FLASH_IMG_BTN_TRY_E_ADDR, USR_FLASH_IMG_BTN_TRY_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_TRY_PRESSED_ADDR, USR_FLASH_IMG_BTN_TRY_PRESSED_ADDR, USR_FLASH_IMG_BTN_TRY_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_TRY_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_TRY_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_TRY_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_UNLOCK_NORMAL_ADDR, USR_FLASH_IMG_BTN_UNLOCK_NORMAL_ADDR, USR_FLASH_IMG_BTN_UNLOCK_NORMAL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_UNLOCK_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_UNLOCK_NORMAL_E_ADDR, USR_FLASH_IMG_BTN_UNLOCK_NORMAL_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_UNLOCK_PRESSED_ADDR, USR_FLASH_IMG_BTN_UNLOCK_PRESSED_ADDR, USR_FLASH_IMG_BTN_UNLOCK_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_BTN_UNLOCK_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_UNLOCK_PRESSED_E_ADDR, USR_FLASH_IMG_BTN_UNLOCK_PRESSED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_0_ADDR, USR_FLASH_IMG_DIGIT_0_ADDR, USR_FLASH_IMG_DIGIT_0_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_0_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_0_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_0_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_1_ADDR, USR_FLASH_IMG_DIGIT_1_ADDR, USR_FLASH_IMG_DIGIT_1_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_1_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_1_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_1_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_2_ADDR, USR_FLASH_IMG_DIGIT_2_ADDR, USR_FLASH_IMG_DIGIT_2_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_2_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_2_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_2_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_3_ADDR, USR_FLASH_IMG_DIGIT_3_ADDR, USR_FLASH_IMG_DIGIT_3_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_3_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_3_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_3_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_4_ADDR, USR_FLASH_IMG_DIGIT_4_ADDR, USR_FLASH_IMG_DIGIT_4_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_4_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_4_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_4_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_5_ADDR, USR_FLASH_IMG_DIGIT_5_ADDR, USR_FLASH_IMG_DIGIT_5_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_5_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_5_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_5_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_6_ADDR, USR_FLASH_IMG_DIGIT_6_ADDR, USR_FLASH_IMG_DIGIT_6_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_6_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_6_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_6_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_7_ADDR, USR_FLASH_IMG_DIGIT_7_ADDR, USR_FLASH_IMG_DIGIT_7_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_7_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_7_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_7_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_8_ADDR, USR_FLASH_IMG_DIGIT_8_ADDR, USR_FLASH_IMG_DIGIT_8_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_8_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_8_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_8_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_9_ADDR, USR_FLASH_IMG_DIGIT_9_ADDR, USR_FLASH_IMG_DIGIT_9_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_9_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_9_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_9_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_END_ADDR, USR_FLASH_IMG_DIGIT_END_ADDR, USR_FLASH_IMG_DIGIT_END_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_END_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_END_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_END_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_STAR_ADDR, USR_FLASH_IMG_DIGIT_STAR_ADDR, USR_FLASH_IMG_DIGIT_STAR_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_DIGIT_STAR_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_STAR_PRESSED_ADDR, USR_FLASH_IMG_DIGIT_STAR_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_BATTERY_LOW_WARING_ADDR, USR_FLASH_IMG_ICON_BATTERY_LOW_WARING_ADDR, USR_FLASH_IMG_ICON_BATTERY_LOW_WARING_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_FAIL_ADDR, USR_FLASH_IMG_ICON_FAIL_ADDR, USR_FLASH_IMG_ICON_FAIL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_FP_ADDR, USR_FLASH_IMG_ICON_FP_ADDR, USR_FLASH_IMG_ICON_FP_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_PASSWORD_ADDR, USR_FLASH_IMG_ICON_PASSWORD_ADDR, USR_FLASH_IMG_ICON_PASSWORD_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_SECURITY_ADDR, USR_FLASH_IMG_ICON_SECURITY_ADDR, USR_FLASH_IMG_ICON_SECURITY_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_SUCCESS_ADDR, USR_FLASH_IMG_ICON_SUCCESS_ADDR, USR_FLASH_IMG_ICON_SUCCESS_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_ICON_WARNING_ADDR, USR_FLASH_IMG_ICON_WARNING_ADDR, USR_FLASH_IMG_ICON_WARNING_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_INPUT_BG_ADDR, USR_FLASH_IMG_INPUT_BG_ADDR, USR_FLASH_IMG_INPUT_BG_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_INPUT_BG_E_ADDR, USR_FLASH_IMG_INPUT_BG_E_ADDR, USR_FLASH_IMG_INPUT_BG_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_KEY_DEL_ADDR, USR_FLASH_IMG_KEY_DEL_ADDR, USR_FLASH_IMG_KEY_DEL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_KEY_DEL_PRESSED_ADDR, USR_FLASH_IMG_KEY_DEL_PRESSED_ADDR, USR_FLASH_IMG_KEY_DEL_PRESSED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_LEFT_1_ADDR, USR_FLASH_IMG_LEFT_1_ADDR, USR_FLASH_IMG_LEFT_1_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_LEFT_2_ADDR, USR_FLASH_IMG_LEFT_2_ADDR, USR_FLASH_IMG_LEFT_2_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_LEFT_3_ADDR, USR_FLASH_IMG_LEFT_3_ADDR, USR_FLASH_IMG_LEFT_3_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_LEFT_4_ADDR, USR_FLASH_IMG_LEFT_4_ADDR, USR_FLASH_IMG_LEFT_4_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_LEFT_5_ADDR, USR_FLASH_IMG_LEFT_5_ADDR, USR_FLASH_IMG_LEFT_5_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_ADDR, USR_FLASH_IMG_TIPS_BATTERY_LOW_WARNING_ADDR, USR_FLASH_IMG_TIPS_BATTERY_LOW_WARNING_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_BATTERY_LOW_WARNING_E_ADDR, USR_FLASH_IMG_TIPS_BATTERY_LOW_WARNING_E_ADDR, USR_FLASH_IMG_TIPS_BATTERY_LOW_WARNING_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_CHOOSE_ADDR, USR_FLASH_IMG_TIPS_CHOOSE_ADDR, USR_FLASH_IMG_TIPS_CHOOSE_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_CHOOSE_E_ADDR, USR_FLASH_IMG_TIPS_CHOOSE_E_ADDR, USR_FLASH_IMG_TIPS_CHOOSE_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_EXIST_ADDR, USR_FLASH_IMG_TIPS_EXIST_ADDR, USR_FLASH_IMG_TIPS_EXIST_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_EXIST_E_ADDR, USR_FLASH_IMG_TIPS_EXIST_E_ADDR, USR_FLASH_IMG_TIPS_EXIST_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_FAIL_E_ADDR, USR_FLASH_IMG_TIPS_FAIL_E_ADDR, USR_FLASH_IMG_TIPS_FAIL_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_INPUT_FAIL_ADDR, USR_FLASH_IMG_TIPS_INPUT_FAIL_ADDR, USR_FLASH_IMG_TIPS_INPUT_FAIL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_INPUT_FP_ADDR, USR_FLASH_IMG_TIPS_INPUT_FP_ADDR, USR_FLASH_IMG_TIPS_INPUT_FP_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_INPUT_FP_E_ADDR, USR_FLASH_IMG_TIPS_INPUT_FP_E_ADDR, USR_FLASH_IMG_TIPS_INPUT_FP_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_INPUT_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_INPUT_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_INPUT_SUCCESS_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_LEFT_ADDR, USR_FLASH_IMG_TIPS_LEFT_ADDR, USR_FLASH_IMG_TIPS_LEFT_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_LEFT_E_ADDR, USR_FLASH_IMG_TIPS_LEFT_E_ADDR, USR_FLASH_IMG_TIPS_LEFT_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_POWER_OFF_ADDR, USR_FLASH_IMG_TIPS_POWER_OFF_ADDR, USR_FLASH_IMG_TIPS_POWER_OFF_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_POWER_OFF_E_ADDR, USR_FLASH_IMG_TIPS_POWER_OFF_E_ADDR, USR_FLASH_IMG_TIPS_POWER_OFF_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_RECOGNIZED_FAIL_ADDR, USR_FLASH_IMG_TIPS_RECOGNIZED_FAIL_ADDR, USR_FLASH_IMG_TIPS_RECOGNIZED_FAIL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_RECOGNIZED_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_RECOGNIZED_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_RECOGNIZED_SUCCESS_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_RETRY_LATER_ADDR, USR_FLASH_IMG_TIPS_RETRY_LATER_ADDR, USR_FLASH_IMG_TIPS_RETRY_LATER_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_RETRY_LATER_E_ADDR, USR_FLASH_IMG_TIPS_RETRY_LATER_E_ADDR, USR_FLASH_IMG_TIPS_RETRY_LATER_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_SUCCESS_E_ADDR, USR_FLASH_IMG_TIPS_SUCCESS_E_ADDR, USR_FLASH_IMG_TIPS_SUCCESS_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_SYNC_TIME_ADDR, USR_FLASH_IMG_TIPS_SYNC_TIME_ADDR, USR_FLASH_IMG_TIPS_SYNC_TIME_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_SYNC_TIME_E_ADDR, USR_FLASH_IMG_TIPS_SYNC_TIME_E_ADDR, USR_FLASH_IMG_TIPS_SYNC_TIME_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_SYSTEM_LOCKED_ADDR, USR_FLASH_IMG_TIPS_SYSTEM_LOCKED_ADDR, USR_FLASH_IMG_TIPS_SYSTEM_LOCKED_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_SYSTEM_LOCKED_E_ADDR, USR_FLASH_IMG_TIPS_SYSTEM_LOCKED_E_ADDR, USR_FLASH_IMG_TIPS_SYSTEM_LOCKED_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_DISABLE_ADDR, USR_FLASH_IMG_TIPS_USER_DISABLE_ADDR, USR_FLASH_IMG_TIPS_USER_DISABLE_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_DISABLE_E_ADDR, USR_FLASH_IMG_TIPS_USER_DISABLE_E_ADDR, USR_FLASH_IMG_TIPS_USER_DISABLE_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_FULL_ADDR, USR_FLASH_IMG_TIPS_USER_FULL_ADDR, USR_FLASH_IMG_TIPS_USER_FULL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_FULL_E_ADDR, USR_FLASH_IMG_TIPS_USER_FULL_E_ADDR, USR_FLASH_IMG_TIPS_USER_FULL_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_INVALID_ADDR, USR_FLASH_IMG_TIPS_USER_INVALID_ADDR, USR_FLASH_IMG_TIPS_USER_INVALID_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_INVALID_E_ADDR, USR_FLASH_IMG_TIPS_USER_INVALID_E_ADDR, USR_FLASH_IMG_TIPS_USER_INVALID_E_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_USER_OK_ADDR, USR_FLASH_IMG_TIPS_USER_OK_ADDR, USR_FLASH_IMG_TIPS_USER_OK_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_VERIFY_FAIL_ADDR, USR_FLASH_IMG_TIPS_VERIFY_FAIL_ADDR, USR_FLASH_IMG_TIPS_VERIFY_FAIL_SIZE);
kdp_memxfer_module.flash_to_ddr(USR_DDR_IMG_TIPS_VERIFY_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_VERIFY_SUCCESS_ADDR, USR_FLASH_IMG_TIPS_VERIFY_SUCCESS_SIZE);
*/ 


#endif
